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Jan 4, 20222 min read
The three witches: preventing glitch nightmares on CDC paths
As electronic design companies are investing more in automotive and safety-critical designs, there is a renewed focus on design...
Dec 6, 20212 min read
Fix first, finish faster!
By James Paris A few years ago, I came across some plans to build a simple bookshelf that would fit perfectly in my home. I already had...
Nov 22, 20213 min read
In the EDA world, efficiency + ease of use = productivity (and profitability!)
By Shelly Stalnaker Electronic design automation (EDA) grew out of the need to make it easier and faster to design and manufacture...
Nov 15, 20212 min read
Improving Time-to-Market and Silicon Quality with a Streamlined IP QA Flow
By Wei-Lii Tan Recently Felipe Schneider (from the Solido Crosscheck applications engineering team) and I hosted a live webinar on how to...
Nov 8, 20213 min read
西門子與台積電深化合作 持續認證設計工具
西門子數位化工業軟體近日在台積電（2330） 2021開放創新平台 (Online Open Innovation Platform®，OIP) 生態系統論壇中宣布系列與台積電合作帶來一系列的新產品認證，雙方在雲端支援 IC 設計以及台積電的全系列 3D...
Nov 4, 20213 min read
We know…power integrity analysis can be a really big pain, especially for really big designs
By Joe Davis Design teams use power integrity analysis to determine if the circuits in their designs will provide the intended...
Oct 25, 20212 min read
Don’t like standing in lines? Get with the (right) programs!
By John Ferguson For a while, it appeared that the worst of the COVID pandemic was behind us. My mind immediately began focusing on a...
Oct 21, 20212 min read
Improving consistency of NLDM and CCS models for better signoff convergence
By Tina Durgia The semiconductor industry has come a long way in terms of the technological advancements and growth. Thanks to these...
Oct 11, 20213 min read
Custom layout designers…Want to know a secret? You can close DRC faster. A lot faster…
By Srinivas Velivala Design rule checking (DRC) closure is a “tax” that custom layout designers must pay at all process nodes. Ask all...
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